The Printing data pump solution is deployed in high large industrial digital printers, and transfers the pixel information from the controlling PC application to the print-head board.

The FPGA implementation has a PCIe Bus mastering block that reads the pixel data from PC memory on demand.

The timing for this type of system is provided by an external encoder that triggers synchronization pulses which are generated from motion and position of the machine.

The logic implemented in the FPGA reads a bulk of data and distributes that data to the serial links which are connected to the print head boards.